An increase in the sampling rate of analog-to-digital conversion may be achieved by the use of composite ADCs. A composite ADC contains a number of interleaved sub-ADCs with a common input and a sequential timing. If the number of sub-ADCs equals N, then the resulting conversion rate is N times larger than the rate of one sub-ADC.
Each sub-ADC incorporated in a composite ADC has its own amplitude frequency response Amp[i, k] and phase frequency response Phs[i, k] (where i is the number of the sub-ADC, 0≦i<N, and k is the number of a test frequency at which the responses were measured). The amplitude frequency response and phase frequency response of the different sub-ADCs are not identical. The differences arise because of deviations in the frequency responses of input signal distributing circuitry and/or responses of analog front ends of the respective sub-ADCs (input amplifiers, track-and-hold circuits, etc.). These differences are inevitable, given current design practices and process technology variations. On the other hand, the misalignment of sub-ADCs frequency responses causes specific signal distortions, with the appearance of spurious frequency components being of prime importance.
The main way to prevent the appearance of the specific distortions in a composite ADC, is to use equalization of its output digital signal. There are several prior art patents concerned with digital equalization of composite an ADC output signal, for example U.S. Pat. No. 5,239,299, U.S. Pat. No. 7,408,495, US Patent Application Publication Nos. US2005/0151679, US2010/0182174, and others. It is possible to carry out equalization of each sub-ADC output signal before interleaving those signals. Such an approach is described in U.S. Pat. No. 5,239,299. Another equalization strategy, with an equalizer processing the aggregate digital signal (after the sub-ADC output signals are interleaved), is suggested in U.S. Pat. No. 7,408,495 and in US Patent Application Publication No. US 2005/0151679.
An equalizer should correct frequency responses of different sub-ADCs in such a way as to eliminate (or at least to reduce) the impact of their divergence on the processed signal, and prevent the rise of correspondent distortions. Furthermore, the equalizer forms the transfer function of the analog to digital conversion system as a whole, in accordance with the predetermined target transfer function (or, what is the same, with the target amplitude frequency response AmpT[k] and target phase frequency response PhsT[k]).
The digital signal at the output of the equalizer may be considered as a combination of N partial signals, the i-th partial signal comprising samples that were created in the sub-ADC with the number i. If a sine wave with a unit amplitude is applied to the input of the composite ADC, then the partial signals are sine waves too, having the amplitudes AmpOut[i, k] and phases PhsOut[i, k]. Had the equalizer be loaded with an ideal assembly of coefficients, the amplitudes AmpOut[i, k] and phases PhsOut[i, k] would be the same as the target amplitude frequency response AmpT[k] and target phase frequency response PhsT[k]. In reality, the equalizer coefficients are different from the ideal coefficients, and the frequency responses of the analog to digital conversion system deviate from the target frequency responses. The deviations may be considered as residual frequency distortions, AmpRes[i, k] and PhsRes[i, k], respectively.
The value of the residual frequency distortions indicates the grade of equalizer performance: the better the equalization, the less are the residual frequency distortions (evaluation of the distortions may be done by their maximum absolute value, or by a root mean square value with the averaging over sub-ADCs number i).
How accurately the frequency distortions of the composite ADC are compensated depends on the validity of an equalizer coefficients calculation. At each sampling interval, the equalizer processes a sample that comes from one of the sub-ADCs of the composite ADC. Different sets of equalizer coefficients are used to correct samples coming from different sub-ADCs, so that the assembly of the coefficients forms a two dimensional array C[i, m], where i is the set number (the same as the number of the corresponding sub-ADC), and m is the number of the equalizer tap (the number of a coefficient in a set).
When an equalizer is used to correct frequency distortions in a time invariant device that can be described by a single pair of amplitude and phase frequency responses, the procedure of the equalizer coefficients calculation is simple enough: the required equalizer frequency responses are found as complementary to the device frequency distortions, and the equalizer coefficients are calculated using an inverse discrete Fourier transform of the required equalizer frequency responses. The set of coefficients found in that way provides absolutely accurate correction of the frequency distortions (at least in theory).
When the equalization of a composite ADC is concerned, the situation is quite different. A composite ADC is a time variant device: at each sampling interval its frequency responses depend on the frequency responses of the sub-ADC being used at that instant. To correct the next sample, the equalizer (located after the composite ADC) uses as a correction addition, a linear combination of the adjacent samples and the equalizer coefficients. However, each adjacent sample is created in a sub-ADC that is different from the sub-ADC that created the sample to be corrected. For this reason, the correction addition differs from the proper value, giving rise to an equalization error. To ensure an accurate compensation of frequency distortions of a composite ADC, each set of equalizer coefficients C[i, m] for a certain i should be calculated taking into account not only the frequency responses of the sub-ADC with the same number I, but the frequency responses of other sub-ADCs as well.
In the U.S. Pat. No. 5,239,299, it is proposed during equalization of a composite ADC, to calculate the equalizer coefficients by measuring the differential variation among the amplitude and phase frequency responses of different sub-ADCs, transforming the frequency responses to the Z domain, and inverting the received matrix of Z polynomials. In the U.S. Pat. No. 7,408,495, it is suggested to calculate the equalizer coefficients by performing inverse discrete Fourier transform of preliminary measured frequency responses of different sub-ADCs. Both approaches are mathematically equivalent, and both suffer from the same disadvantage: the equalizer coefficients are calculated with an error due to the fact that the set of equalizer coefficients corresponding to one sub-ADC is calculated without taking in account the distortions of other sub-ADCs frequency responses.
In the U.S. Pat. No. 7,408,495, an analog to digital conversion system was proposed, where the equalization error due to imperfect equalizer coefficients calculation was eliminated by measuring the amplitude and phase of the partial signals in the equalizer output digital signal anew, and determining in that way, the residual frequency distortions, AmpRes[i, k] and PhsRes[i, k]. After that, the determined residual frequency distortions were used to correct the equalizer coefficients assembly. A difficulty with such an analog to digital conversion system is that the repeated measurement of frequency distortions extends excessively the duration of the calculations. This being so, makes it impractical to use the proposed system in devices where prompt target change is required.
A different method of equalizer coefficients calculation, based on the least square approximation, is described in the US Patent Application Publication No. US 2010/0182174. That method eliminates a reason for the above described equalization errors. However, the implementation of an analog to digital conversion system with such procedure of equalizer coefficients calculation, requires numerical computation of integrals and inversion of a large matrix that is often nearly singular. The needed computational resources turn out to be too big, so that the possibility to use this method of equalizer coefficients calculation in real devices becomes doubtful. Again, time of calculations, while using that method, is too lengthy, and makes difficult fast change of equalizer performance characteristics.
The considerations presented above show that an equalization system for an improved interleaved analog to digital converter is needed, which does not require a prohibitive amount of resources for implementation, permits a prompt change of requested specifications (an most importantly, permits a prompt change of target frequency responses), and is not impaired by equalization errors due to imperfect calculation of equalizer coefficients.